This e-mail to you is a request to have the management of your Company take a look at SoC designs for "Software Defined Instruments". In purpose and implementation, this is very similar to the concept of "Software Defined Radio", for which, as you will know, Intel has a large ongoing multi-million dollar project. The differences are in the size of the market and the much simpler and smaller SoC chip involved. The Test and Measurement (T&M and ATE) market, which would be fully covered by these SoCs, is only about $15 Billion, on the other hand, the SoCs have only a fraction of the size and process difficulties which are involved in the SoC for "Software Defined Radio".

At present I have an architecture for a "Software Defined DSO", for the bandwidth range of 200 MHz and 2 GHz as a single SoC. As my layouts for individual chips on PCMCIA format show, the functional blocks will not stress process technology for your company. All devices are low-power CMOS. The exception being the two SPT chips for the 2-GHz version, which will have to be added to the circuit when using the same SoC.

You will find all information on my Web-site: http://www.msmisp.com/futuretest/

Gary Smith, Director and Chief Analyst of Dataquest, Gartner Inc., has his staff looking at my papers now, but his preliminary comments were not encouraging, because the concept is apparently completely new and will therefor not easily be accepted. He said, --- Harry, --- Looks ok to me, but as with any missionary sell --- it's tough.